The Chip So Big They Can't Throw the Broken Part Away
This AI Chip Is the Size of a Dinner Plate — And It Breaks Every Rule of Yield

CEREBRAS WSE-3
- Every chip factory on Earth runs on the same rule: cut the wafer into hundreds of chips, test them, and throw the broken ones away.
- But Cerebras — which reported cloud revenue up 281% this week — makes a processor that IS the whole wafer, roughly the size of a dinner plate and about 56× larger than a GPU.
- So they inverted the rule: instead of designing against defects, they designed for them, with around 900,000 tiny cores and a fabric that routes around any core that dies.
- This video explains that inversion — and the part that actually matters, which isn't the chip at all: going wafer-scale let them skip HBM memory, CoWoS packaging and 3nm capacity, the exact three shortages the rest of the industry is fighting over.
Why this matters
That rule is what "yield" means. There is nothing to dice, so there is nothing to discard.
Claude Code v2.1.232 (shipped 13 Aug 2026): your sessions can now message each other. Type @ in a prompt and pick another live session by name. Subagents also fork by default now — they inherit your full conversation and prompt cache and run in the background rather than blocking you. Then set /config → "Messages from your other sessions" to HOLD on whichever session is doing deep work, so inbound messages queue instead of interrupting. Full walkthrough in the video.
Genuine question for the yield people: is "design for the defect" a wafer-scale luxury, or should more of us be building redundancy in instead of screening it out?
Argue with me on LinkedIn- Cerebras Systems Q2 2026 results, announced 12 August 2026 (GlobeNewswire; investors.cerebras.ai; SEC Form 8-K) — GAAP cloud and other services revenue $126.0m, up 281% year on year; core cloud and other services revenue $127.7m, up 287%; GAAP total revenue $180.1m, up 74%; core gross margin 41%, an improvement of roughly 940 basis points year on year; $6.4bn gross proceeds from its IPO; more than 600 MW of data-centre capacity live or under contract for delivery by the end of 2027.
- Cerebras Q2 2026 release, same document — "through its wafer-scale architecture, Cerebras avoids many components currently in short supply, including HBM memory, CoWoS packaging, and 3nm fabrication technology." This sentence is the thesis of the video.
- Cerebras engineering blog, "100x Defect Tolerance: How Cerebras Solved the Yield Problem" — redundant compute cores, redundant routing and a fail-in-place fabric; approximately 900,000 cores remain functional after defect mapping and redundant routing; each core is roughly 0.05 mm²; the company claims about 100× the fault tolerance of a GPU measured by silicon area affected per defect. ⚠ THESE ARE CEREBRAS' OWN PUBLISHED FIGURES. No independent third-party verification was located, and the video attributes them as company claims rather than as measured results.
- Cerebras product page — WSE-3 die area approximately 46,225 mm², about 56× the area of the largest GPU.
- Anthropic, Claude Code changelog v2.1.232, 13 August 2026 — subagents fork by default and inherit the full conversation and prompt cache, with non-teammate spawns in interactive sessions running in the background; "@" mentions another live session by name; SendMessage resolves bare session names; new /config rows "Dialog expiry" and "Messages from your other sessions" (accept / hold / refuse). This is the Hack of the Week. No vendor endorsed. Cerebras is named because it is the subject of the story; NVIDIA is never named and "a GPU" appears only as the size comparison Cerebras itself publishes. Nothing here characterises any company negatively.
Full transcript, 279 spoken words
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